Interactive before/after verifier for the findings from executing all 103 registered
NODES in et-soc1-chip-diagram across both desktop (PH = false)
and phone (PH = true) viewports: (1) 9 desktop header-title vs. epistemic-tag-pill collisions,
(2) phone viewport right-edge clipping on st29 and package,
(3) 5 unprotected +k parameter parsers producing NaN titles, and
(4) 3 stale prose/metadata contradictions.
On desktop (!PH), KT.frame and ihead draw the 30px bold title
(x = -150, y = -32) on the exact same vertical band (y = -56..-30) as the
right-aligned epistemic tag pills starting at xr = 1074. When a scale uses the dual pill
GT = [['generic', 'textbook construction'], ['unknown', 'this chip’s own circuit: not published']]
(614 SVG units wide, reaching x = 460) or has a 50+ character title, the title and pill collide.
| Scale ID & Line | Title (x = -150) |
Current Title Right | Current Tag Left | Current Gap | Proposed Gap |
|---|
// 1. Shorten GT's 2nd pill in index.html (L6842) — saves 103 SVG units across all 14 GT scales:
- const GT = [['generic', 'textbook construction'], ['unknown', 'this chip’s own circuit: not published']];
+ const GT = [['generic', 'textbook construction'], ['unknown', 'chip circuit: not published']];
// 2. In KT.frame (L4365) & ihead (L6226), step down title font-size when title approaches xr:
+ const availW = xr - (-150) - 24;
+ const estW = title.length * 16;
+ if (estW > availW) tEl.setAttribute('style', `font-size:${Math.max(22, Math.floor(30 * availW / estW))}px`);PH = true) Right-Edge Clipping on st29 & packagest29 (“29th Street”, L3980) — Phone Viewport x = 130..890
100% Clipped (x = 890..994)
// index.html L3980 (draw29th):
- T(L, X0 + W + 10, Y0 + 6, 'sea level', 'o-s');
+ T(L, PH ? X0 + W : X0 + W + 10, PH ? Y0 - 10 : Y0 + 6, 'sea level', 'o-s', PH ? 'end' : 'start');package (“The package”, L4243) — Phone Viewport x = 130..890
61 chars unwrapped (x = 150..882)
// index.html L4243 (drawPackage):
- T(gs, sx, sy - 12, 'in section, heights ×5 (3.9 mm in all; layer heights generic)', 'o-s');
+ owrap(gs, sx, PH ? sy - 38 : sy - 12, 'in section, heights ×5 (3.9 mm in all; layer heights generic)', 710, 'o-s');+k Parameter Parsing (NaN Title Bug on 5 Scales)
Six parameterized scales (shire.bank, shire.subbank, shire.panel,
memshire, dram, dram.bank) wrap their parameter in
n0 = v => (v == null || isNaN(v) ? 0 : v) (L5759), so navigating to a bare scale ID like
#at=shire.bank cleanly defaults to index 0. Five other scales use raw +k,
producing NaN in titles and subheadings when visited without :0.
| Scale ID & Line | Current Parser | Bare URL Hash (k = undefined) |
Current Title Rendered | Proposed Fix (n0(+k)) |
|---|---|---|---|---|
shire (L3521) |
k => ({sid: +k}) |
#at=shire |
Shire NaN: thirty-two cores… | Compute shire 0 (row 0, col 0)… |
l1d.block (L5775) |
k => ({block: +k}) |
#at=…/l1d/l1d.block |
Block NaN of the L1 data scratchpad | Block 0 of the L1 data scratchpad |
shire.neigh (L5971) |
k => ({nb: +k}) |
#at=shire:0/shire.neigh |
Neighborhood NaN of shire 0… | Neighborhood 0 of shire 0… |
vpu.lane (L5984) |
k => ({lane: +k}) |
#at=…/vpu/vpu.lane |
Lane NaN of the vector unit | Lane 0 of the vector unit |
pcie.lane (L7218) |
k => ({lane: +k}) |
#at=pcie/pcie.phy/pcie.lane |
PCIe lane NaN: a SerDes, block by block | PCIe lane 0: a SerDes, block by block |
// 4A. index.html L7768 (COMPS.inferred) — still claims routes' turning order is "Still inferred",
// contradicting L993 (byline), L9513 (Tour step 3), L10098 (#honest-text), and ASKS (settled: true via L104):
- 'Still inferred: the LPDDR4X pairing (dashed), the die’s east–west handedness, the routes’ turning order, the inside of a shire, and the sizes.'
+ 'Still inferred: the LPDDR4X pairing (dashed), the die’s east–west handedness, the inside of a shire, and the sizes. (The mesh’s dimension-order turning rule was settled on 29 September by L104.)'
// 4B. index.html L7711 (COMPS.mesh) — says L104 was measured on "two cards", whereas L993, L1153,
// L10098, and D.facts['L104'].cards (["a2", "a3", "a1c1"]) all state "three cards":
- 'Routes are shortest paths in dimension order, measured on two cards on 29 September…'
+ 'Routes are shortest paths in dimension order, measured on three cards on 29 September…'
// 4C. Spacesheep space description metadata — still cites old counts from an earlier revision:
- '…six data flows to memory with measured latency, bandwidth and energy; a 12-step tour;…'
+ '…eleven data flows with measured latency, bandwidth and energy; a 17-step tour;…'